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AD9550 - Integer-N Clock Translator

General Description

The AD9550 is a phase-locked loop (PLL) based clock translator designed to address the needs of wireline communication and base station applications.

The device employs an integer-N PLL to accommodate the applicable frequency translation requirements.

It accepts a single-ended input reference signal at the REF input.

Overview

Integer-N Clock Translator for Wireline Communications AD9550.

Key Features

  • Converts preset standard input frequencies to standard output frequencies Input frequencies from 8 kHz to 200 MHz Output frequencies up to 810 MHz LVPECL and LVDS (200 MHz CMOS) Preset pin-programmable frequency translation ratios On-chip VCO Single-ended CMOS reference input Two output clocks (independently programmable as LVDS, LVPECL, or CMOS) Single supply (3.3 V) Very low power:.